The software team at K2 strives to blur the lines between the various types of software development and encourages team members to get into parts of the stack they may not otherwise have experience with. This spectrum includes HDL programming (VHDL, SystemVerilog), embedded software on microcontrollers (Rust, C++), operating systems (Rust, C++, C), application software on flight computers (Rust, C++), GNC algorithms (Rust, C++), to test systems (Python), and many things inbetween. By doing this, we create a stronger team with more capable engineers. For now, this does not include front-end, artificial intelligence, or machine learning development
As a part of the team, you will be responsible for the development and verification of FPGA firmware used to fly some of the largest spacecraft that have ever been flown. You will be able to write mission-critical code that controls propulsion systems, attitude control systems, RF systems, and power systems to ensure safe and reliable operation of the vehicle. In your first 6 months you will work with your team to develop core pieces of the FPGA architecture such as the strategies for fault tolerance, real-time control, high-speed data routing, and telemetry downlink. In your first year you will implement larger and more complex FPGA systems and begin verifying your code using both software and hardware in the loop simulators. In your first two years you will operate your code on multiple spacecraft, demonstrating robust performance in demanding missions
Own the architecture and implementation of critical programmable logic systems across the spacecraft that support vehicle networking, RF systems, and real-time control of all spacecraft subsystems
Implement these architectures in RTL using VHDL and SystemVerilog
Verify and validate FPGA designs using a mix of simulation, bench-testing, and Hardware In The Loop testbeds
Support integration, test, and troubleshooting efforts for FPGA designs across all levels of the spacecraft development and manufacturing
Develop the tools and infrastructure to support rapid, high-reliability FPGA solutions across all subsystems