Наши требования
Logical design experience in relevant industry
Experience range 4-8 years in Semiconductor Industry/Product development exposure
Be highly motivated, a self-starter, and a team player
Ability to work across teams and debugging issues seen to find root causes
Degree in Computer Science, Engineering or related subject
Ability to script in Python and/or TCL for automation and to solve design issues
SystemVerilog
Knowledge of digital design flows
Processor design
Application specific blocks
High-speed serial interfaces
Complex third-party IP integration
Arithmetic pipeline design
Floating-point design
Design for test
Synthesis
Timing Analysis
Project Planning
Power Integrity
Silicon transistor